Reducing Register File Power Consumption by Exploiting Value Lifetime Characteristics
نویسندگان
چکیده
With the trend towards wider instruction issue and larger instruction windows, register les grow both in terms of size and number of read/write ports. However, large multi-ported register les consume a substantial amount of power, and may also limit the cycle time of a processor. This work attempts to address these issues by taking advantage of the facts that many register accesses show extremely good temporal locality, and that many register values are very short-lived. Based on these ideas, this paper proposes bu ering the result between functional units and the register le in a \holding tank" we call the Value Aging Bu er (VAB). Due to the temporal locality of value access, most of the accesses to register values can be serviced from the VAB. Since the VAB is smaller than a typical register le, it can have better power characteristics. Furthermore, reducing read/write requests at the register le also allows us to reduce the number of ports provided on the register le. Thus, this gives us multiple ways in which register le power consumption is reduced. For example, with a 16-entry VAB, register le read and write operations can be reduced by 64% and 61% respectively for SPECint95 benchmarks. The VAB o ers roughly a 30% power savings for register les, with less than a 5% performance loss.
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